Yazhou Zu, Charles R. Lefurgy, Jingwen Leng, Matthew Halpern, Michael S. Floyd, Vijay Janapa Reddi
In Proc. of International Symposium on Microarchitecture (MICRO), 2015.
We provide the first full-system analysis of adaptive guardbanding using a production POWER7+ multicore, one of the few commercial systems that offers adaptive guardbanding. Adaptive guardbanding is an efficient way to improve processor performance and save energy without compromising reliability under different operating conditions and workload environments. Instead of setting a fixed Vdd for the processor based on the worst-case design, adaptive guardbanding dynamically adjusts the processor's clock frequency and voltage based on the timing margin. However, there is yet to be a comprehensive full-system measurement-based study on adaptive guardbanding's behavior today. On the basis of a broad collection of hardware measurements conducted on an enterprise-class server, we show the benefits of adaptive guardbanding in a practical setting are strongly dependent upon workload characteristics and chip-wide multicore activity. A key finding is adaptive guardbanding's benefits diminish as the number of active cores increase. The high-level system effects are the result of interactions between the application characteristics, architecture and the underlying voltage regulator module's loadline effect and IR drop effects. In addition to our systematic analysis and characterization, we introduce adaptive guardband scheduling to reclaim, and improve, an adaptive guardbanding system's efficiency under different enterprise usage scenarios. Our solution reduces processor power consumption by 6.2% over a highly optimized system. In practice, the complementary software solution doubles the adaptive guardbanding hardware's efficiency.