Transactions and Journals

 

2023

 

1.       Fangxin Liu, Wenbo Zhao, Zongwu Wang,Yongbiao Chen, Xiaoyao Liang, and Li Jiang*, "ERA-BS: Boosting the Efficiency of ReRAM-based PIM Accelerator with Fine-Grained Bit-Level Sparsity,"accepted by IEEE Transactions on Computers (TC), 2023 (CCF-A) [PDF]

 

2.       Chen Nie*, Chenyu Tang*, Jie Lin, Huan Hu, Chenyang Lv*, Ting Cao, Weifeng Zhang,  Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan Sun, and Zhezhi He, "VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations,"accepted by IEEE Transactions on Computers (TC), 2023 (CCF-A) [PDF]

 

3.       Maosong Xie=, Yueyang Jia=, Chen Nie*, Zuheng Liu, Alvin Tang, shiquan Fan, Xiaoyao Liang, Li Jiang, Zhezhi He, and Yang Rui, "Monolithic 3D Integration of 2D Transistors and Vertical RRAMs in 1T-4R Structure for High-Density Memory,"accepted by Nature Communications(NC), 2023 (CCF-A) [PDF]

 

2022

4.         Fangxin Liu,Zongwu Wang,Yongbiao Chen, Zhezhi He, Tao Yang, Xiaoyao Liang, and Li Jiang*, "SoBS-X:Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD), 2022 (CCF-A)[PDF]

5.         Tao Yang, Dongyue Li, Fei Ma, Zhuoran Song, Yilong Zhao, Jiaxi Zhang, Fangxin Liu and Li Jiang*, "PASGCN: An ReRAM-Based PIM Design for GCN with Adaptively Sparsified Graphs,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD), 2022 (CCF-A)[PDF]

6.         Tao Yang,Hui Ma,Xiaoling Li,Fangxin Liu,Yilong Zhao,Zhezhi He and Li Jiang*, "DTATrans: Leveraging Dynamic Token-based Quantization with Accuracy Compensation Mechanism for Efficient Transformer Architecture,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]

7.           Zhuoran Song, Heng Lu, Li Jiang, Naifeng Jing, Xiaoyao Liang, "Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration Framework,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]

8.         Weidong Cao, Yilong Zhao, (CO-first author), Boloor Adith Jagadish, Yinhe Han, Xuan Zhang*, Li Jiang*, "Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals,"accepted by IEEE Transactions on Computers (TC), Accepted, 2022 (CCF-A)[PDF]

9.         Fangxin Liu, Wenbo Zhao, Yongbiao Chen, Zongwu Wang, Tao Yang and Li Jiang*, "SSTDP: Supervised Spike Timing Dependent Plasticity for Efficient Spiking Neural Network Training," accepted by Frontiers in Neuroscience, section Neuromorphic Engineering, 2022[PDF]

10.         Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yilong Zhao, Tao Yang, Yiran Chen and Li Jiang*, "IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]

11.         Zhuoran Song, Yihong Xu, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang, "CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction," CoRR abs/2203.04570,2022 [PDF]

12.         Zhuoran Song, Yihong Xu, Han Li, Naifeng Jing, Xiaoyao Liang, Li Jiang, "DNN Training Acceleration via Exploring GPGPU Friendly Sparsity," CoRR abs/2203.05705,2022 [PDF]

13.         Yilong Zhao, Li Jiang*, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Fangxin Liu, Tao Yang, Xiaoyao Liang, " RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN," CoRR abs/2210.15255,2022 [PDF]

2021

14.         Tao Yang, Zhezhi He, Tengchuan Kou, Qingzheng Li, Qi Han, Haibao Yu, Fangxin Liu, Yun Liang, and Li Jiang. 2021. BISWSRBS: A Winograd-based CNN Accelerator with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization. ACM Trans. Reconfigurable Technol. Syst. 14, 4, Article 18 (TRTS) (December 2021), 28 pages. (CCF-B)[PDF]

15.         Zhuoran Song, Yanan Sun, Lerong Chen, Tianjian Li, Naifeng Jing, Xiaoyao Liang, Li Jiang*, "ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 1, pp. 129-142, Jan. 2021 (CCF-A)[PDF]

16.         Yanan Sun, Chang Ma, Zhi Li, Yilong Zhao, Jiachen Jiang, Weikang Qian, Rui Yang, Zhezhi He, and Li Jiang*, "Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing, "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021, PP(99):1-1.(CCF-A)[PDF]

17.        Hongtao Zhong, Shengjie Cao, Li Jiang, Xia An, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang and Xueqing Li, "DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays, "IEEE Transactions on very large scale intergration (VLSI) systems, vol. 29, no. 11, Nov.2021,PP:1981-1993 (CCF-B)[PDF]

2020

18.        Fangxin Liu, Wenbo Zhao, Yanzhi Wang, Changzhi Dai, Li Jiang, "AUSN: Approximately Uniform Quantization by Adaptively Superimposing Non-uniform Distribution for Deep Neural Networks, "CoRR abs/2007.03903[PDF]

2019

19.         Li Jiang, Zhuoran Song, Haiyue Song, Chenwen Xu, Qiang Xu, Naifeng Jing, Weifeng Zhang, Xiaoyao Liang: Energy-Efficient and Quality-Assured Approximate 1 Computing Framework Using a Co-Training Method. ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 24, No. 6, Article 59. August 2019. (CCF-B)[PDF]

20.       Yanan Sun, Jiawei Gu, Weifeng He, Qin Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, Li Jiang*: Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. IEEE Trans. on Circuits and Systems (TCAS), 66-II(5): 753-757 (2019)[PDF]

2018

21.       Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, and Xiaoyao Liang: CNFET-based high throughput SIMD architecture. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD), 37(7):1331-1344, 2018. (CCF-A)[PDF]

22.       Chen Wang, Yanan Sun, Shiyan Hu, Li Jiang, and Weikang Qian: Variation-aware global placement for improving timing-yield of carbon-nanotube field effect transistor circuit. ACM Trans. Design Autom. Electr. Syst. (TODAES), 23(4):44:1-44:27, 2018. (CCF-B)[PDF]

23.       Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao Liang, and Naifeng Jing. IBOM: an integrated and balanced on-chip memory for high performance gpgpus. IEEE Trans. Parallel Distrib. Syst. (TPDS), 29(3):586-599, 2018. (CCF-A)[PDF]

2017

24.       Jianfei Wang, Fengfeng Fan, Li Jiang, Xiaoyao Liang, and Naifeng Jing: Incorporating selective victim cache into GPGPU for high-performance computing. Concurrency and Computation: Practice and Experience, 29(24), 2017. (CCF-C)[PDF]

25.       Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, and Xiaoyao Liang: Bank stealing for a compact and efficient register file architecture in GPGPU. IEEE Trans. VLSI Syst. (TVLSI), 25(2):520-533, 2017. (CCF-B)[PDF]

2016

26.      Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, and Li Jiang*: A novel test method for metallic cnts in cnfet-based srams. IEEE Trans. on CAD of Integrated Circuits and   Systems (TCAD), 35(7):1192-1205, 2016. (CCF-A)[PDF]

27.      Naifeng Jing, Li Jiang, Tao Zhang, Chao Li, Fengfeng Fan, and Xiaoyao Liang: Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs. IEEE Trans. on Computers (TC), 65(1):122-135, 2016. (CCF-A)[PDF]

2015

28.       Xiaolong Zhang, Huiyun Li, Li Jiang, and Qiang Xu. A low-cost TSV test and diagnosis scheme based on binary search method. IEEE Trans. VLSI Syst. (TVLSI), 23(11):2639-2647, 2015. (CCF-B)[PDF]

2013

29.       Li Jiang, Qiang Xu, and Bill Eklow. On effective through-silicon via repair for 3-d-stacked ics. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD), 32(4):559-571, 2013. (CCF-A)[PDF]

2012

30.       Li Jiang, Qiang Xu, Krishnendu Chakrabarty, and T. M. Mak. Integrated test-architecture optimization and thermal-aware test scheduling for 3-d socs under pre-bond test-pin-count constraint. IEEE Trans. VLSI Syst. (TVLSI), 20(9):1621-1633, 2012. (CCF-B)[PDF]

Conferences

2024

 

31.        Fangxin Liu=, Ning Yang=, Haomin Li, Zongwu Wang, Zhuoran Song, Songwen Pei and Li Jiang*, "SPARK: Scalable and Precision-Aware Acceleration of Neural Networks via Efficient Encoding," accepted by 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA ),2024(CCF-A) [PDF]

32.       Fangxin Liu=, Haomin Li=, Ning Yang, Yichi Chen, Zongwu Wang, Tao Yang, Li Jiang*, "PAAP-HD: PIM-Assisted Approximation for Efficient Hyper-Dimensional Computing," accepted by 29th Asia and South Pacific Design Automation Conference (ASPDAC),2024(CCF-C) [PDF]

33.      Fangxin Liu=, Haomin Li=, Ning Yang, Zongwu Wang, Tao Yang, Li Jiang*, "TEAS: Exploiting Spiking Activity for Temporal-wise Adaptive Spiking Neural Networks," accepted by 29th Asia and South Pacific Design Automation Conference(ASPDAC),2024(CCF-C) [PDF]

34.       Shiyuan Huang=, Fangxin Liu=, Tian Li, Zongwu Wang, Haomin Li, Li Jiang*, "TSTC: Enabling Efficient Training via Structured Sparse Tensor Compilation," ccepted by 29th Asia and South Pacific Design Automation Conference (ASPDAC),2024(CCF-C) [PDF]

35.       Haomin Li=, Fangxin Liu=, Yichi Chen, Li Jiang*, "HyperFeel: An Efficient Federated Learning Framework Using Hyperdimensional Computing," accepted by 29th Asia and South Pacific Design Automation Conference (ASPDAC),2024(CCF-C) [PDF]

2023

 

36.         Fangxin Liu, Ning Yang and Li Jiang*, "PSQ: An Automatic Search Framework for Data-Free Quantization on PIM-based Architecture," to appear in IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)[PDF]

37.         Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang, "HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model," to appear in IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)[PDF]

38.       Haomin Li, Fangxin Liu, Yichi Chen and Li Jiang*, "HyperNode: An Efficient Node Classification Framework Using HyperDimensional Computing, "ACM/IEEE International Conference on Computer-Aided Design (ICCAD), 2023(CCF-B) [PDF]

39.       Fangxin Liu, HaominLi, Yongbiao Chen, TaoYang and Li Jiang*, "HyperAttack: An Effcient Attack Framework for HyperDimensional Computing, "ACM/IEEE Design Automation Conference (DAC), 2023(CCF-A)[PDF]

40.       Tao Yang, YiyuanZhou, QidongTang, FengXu, HuiMa, JieruZhao and Li Jiang*, "SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication, "ACM/IEEE Design Automation Conference (DAC), 2023(CCF-A)[PDF]

41.       Zhuoran Song, Heng Lu, Gang Li, Li Jiang, Naifeng Jing, Xiaoyao Liang, "PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation, "ACM/IEEE Design Automation Conference (DAC), 2023(CCF-A) (Best Paper Award)[PDF]

42.      Fangxin Liu, Wenbo Zhao, Zongwu Wang, XiaokangYang and Li Jiang*, "SIMSnn:A Weight-Agnostic ReRAM-based Search-In-Memory Engine for SNN Acceleration, "Design Automation & Test in Europe Conference & Exhibition (DATE), 2023 (CCF-B)[PDF]

43.       Tao Yang, HuiMa, Yilong Zhao, Fangxin Liu, Zhezhi He, Xiaoli Sun and Li Jiang*, "PIMPR:PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy, "Design Automation & Test in Europe Conference & Exhibition (DATE), 2023 (CCF-B)[PDF]

44.       Yaoyao Ye, Zixuan Liu, Jungan Liu, Li Jiang, "ASDR: An Application-Specific Deadlock-Free Routing for Chiplet-Based Systems, "Proceedings of the 16th International Workshop on Network on Chip Architectures, (NoCArc), 2023 (CCF-A)[PDF]

 

2022

45.       Fangxin Liu, Zongwu Wang,Wenbo Zhao, Yongbiao Chen, Xiaokang Yang and Li Jiang*, "Randomize and Match: Exploiting Irregular Sparsity for Energy Efficient Processing in SNNs, "to appear in IEEE International Conference on Computer Design (ICCD), 2022 (CCF-B)[PDF]

46.       Fangxin Liu, Haomin Li, Xiaokang Yang, Li Jiang*, "L3E-HD: A Framework Enabling Efficient Ensemble in High-Dimensional Space for Language Tasks, "International Conference on Research and Development in Information Retrieval (SIGIR), 2022 (CCF-A)[PDF]

47.       Fangxin Liu, Wenbo Zhao, Zongwu Wang,Qidong Tang, Yongbiao Chen,Zhezhi He,Naifeng Jing,Xiaoyang Liang and Li Jiang*, "EBSP: Evolving Bit Sparsity Patterns for Hardware-Friendly Inference of Quantized Deep Neural Networks, "ACM/IEEE Design Automation Conference (DAC), 2022 (CCF-A)[PDF]

48.       Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Tao Yang, Zhezhi He, Xiaokang Yang and Li Jiang*, "SATO: Spiking Neural Network Acceleration via Temporal-Oriented Dataflow and Architecture, "ACM/IEEE Design Automation Conference (DAC), 2022 (CCF-A)[PDF]

49.       Fangxin Liu, Wenbo Zhao, Yongbiao Chen, Zongwu Wang, Zhezhi He, Rui Yang, Qidong Tang, Tao Yang, Cheng Zhuo and Li Jiang*, "PIM-DH: ReRAM-based Processing-in-Memory Architecture for Deep Hashing Acceleration, "ACM/IEEE Design Automation Conference (DAC), 2022 (CCF-A)[PDF]

50.       Fangxin Liu, Wenbo Zhao, Zongwu Wang,Yongbiao Chen, Li Jiang*, "SpikeConverter: An Efficient Conversion Framework Zipping the Gap between Artificial Neural Networks and Spiking Neural Networks, "Association for the Advancement of Artificial Intelligence(AAAI), 2022 (CCF-A)[PDF]

51.       Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang, Xiaobing Tu, Xiaoyao Liang, Li Jiang*, "N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores, "Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), February 2022, Pages 112-122 (CCF-B)[PDF]

52.       Tao Yang, Dongyue Li, Zhuoran Song, Yilong Zhao, Fangxin Liu, Zongwu Wang, Zhezhi He and Li Jiang*, "DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture, "Design Automation & Test in Europe Conference & Exhibition (DATE), 2022 (CCF-B)[PDF]

53.       Zongwu Wang, Zhezhi He, Rui Yang, Shiquan Fan, Jie Lin, Fangxin Liu, Yueyang Jia, Chenxi Yuan, Qidong Tang, and Li Jiang*, "Self-Terminated Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing, "Design Automation & Test in Europe Conference & Exhibition (DATE), 2022 (CCF-B) (Best Paper Award)[PDF]

54.       Chen Nie, Zongwu Wang, Qidong Tang, Chenyang Lv, Li Jiang, Zhezhi He, "Cross-layer Designs against Non-ideal Effects in ReRAM-based Processing-in-Memory System, "23rd International Symposium on Quality Electronic Design(ISQED), 2022 (CCF-B)[PDF]

55.       Qidong Tang, Zhezhi He, Fangxin Liu, Zongwu Wang, Yiyuan Zhou, Yinghuan Zhang, Li Jiang*, "HAWIS: Hardware-Aware Automated WIdth Search for Accurate, Energy-Efficient and Robust Binary Neural Network on ReRAM Dot-Product Engine," 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022, pp. 226-231 (CCF-C)[PDF]

2021

56.       Fangxin Liu, Wenbo Zhao, Zhezhi He, Yanzhi Wang, Zongwu Wang, Changzhi Dai, Xiaoyao Liang, Li Jiang*, "Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point, "IEEE/CVF International Conference on Computer Vision (ICCV), 2021 (CCF-A)[PDF]

57.       Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He and Li Jiang*, "PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration, "ACM/IEEE Design Automation Conference (DAC), pages 1-6, 2021. (CCF-A)[PDF]

58.       Min Li, Yu Li, Ye Tian, Li Jiang and Qiang Xu, "AppealNet: An Efcient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference, "ACM/IEEE Design Automation Conference (DAC), pages 1-6, 2021. (CCF-A)[PDF]

59.       Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Yongbiao Chen and Li Jiang*, "Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator, "to appear in International Conference on Computer-Aided Design (ICCAD), 2021(CCF-B, CSRanking top conference)[PDF]

60.       Hanchen Guo, Zhehan Lin, Yunfei Gu, Chentao Wu, Li Jiang, Jie Li, Guangtao Xue, Minyi Guo, "Lazy-WL: A Wear-aware Load Balanced Data Redistribution Method for Efficient SSD Array Scaling, "to appear IEEE International Conference on Cluster Computing (CLUSTER), 2021 (CCF-B)[PDF]

61.       Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Tao Yang, Xiaoyao Liang, Naifeng Jing and Li Jiang*, "SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network, "International Conference on Computer Design (ICCD), 2021 (CCF-B)[PDF]

62.       Dongyue Li, Tao Yang, Lun Du, Zhezhi He, Li Jiang*, "AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying Graphs, "to appear in International Conference on Information and Knowledge Management (CIKM), 2021 (CCF-B)[PDF]

63.       Ziqi Meng, Weikang Qian, Yanan Sun, Yilong Zhao, Rui Yang, and Li Jiang*, "Digital offset for RRAM-based neuromorphic computing: a novel solution to conquer cycle-to-cycle variation," to appear in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), pages 1078-1083, 2021(CCF-B)[PDF]

64.     Tao Yang, Hui Ma,Xiaoling Li,Fangxin Liu,Yilong Zhao, Zhezhi He and Li Jiang*, "DTATrans: Leveraging Dynamic Token-based Quantization with Accuracy Compensation Mechanism for Efficient Transformer Architecture," to appear in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), 2021(CCF-B)[PDF]

65.       Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing and Xiaoyao Liang*, "PIPArch: Programmable Image Processing Architecture Using Sliding Array, "International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2021 (CCF-C)[PDF]

66.       Yilong Zhao, Zhezhi He, Naifeng Jing Jing, Xiaoyao Liang and Li Jiang*, "Re2PIM: A Reconfigurable ReRAM-based PIM Design for Variable-sized Vector-Matrix Multiplication, "to appear in ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 15-20, 2021. (CCF-C)[PDF]

67.       Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi He, "Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support, "ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 347-352, 2021. (CCF-C)[PDF]

68.       Fangxin Liu, Wenbo Zhao, Zongwu Wang, Tao Yang and Li Jiang*, "IM3A: Boosting Deep Neural Network Efficiency via In-Memory Addressing-Assisted Acceleration, "ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 253-258, 2021. (CCF-C)[PDF]

69.       Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang*, "ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator, "to appear in International Symposium on Circuits and Systems (ISCAS), 2021. (CCF-C)[PDF]

70.       Xingyi Wang, Yu Li, Yiquan Chen, Shiwen Wang, Yin Du, Cheng He, YuZhong Zhang, Pinan Chen, Xin Li, Wenjun Song, Qiang Xu, and Li Jiang*, "On Workload-Aware DRAM Failure Prediction in Large-Scale Data Centers, "to appear in IEEE VLSI Test Symposium(VTS), 2021. (CCF-C)[PDF]

71.       Yunyan Hong, Qiang Xu and Li Jiang*, "Skimming and Scanning for Untrimmed Video Action Recognition, "to appear in International Congress on Image and Signal Processing, BioMedical Engineering and Informatics (CISP-BMEI), 2021[PDF]

72.          Tianhong Shen, Yanan Sun, Weifeng He, Zhi Li, Weiyi Liu, Zhezhi He, Li Jiang, "A Ternary Memristive Logic-in-Memory Design for Fast Data Scan, "to appear in IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), 2021[PDF]

 

2020

73.       Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han and Li Jiang*: PIM-Prune: Fine-Grain DCNN pruning for Crossbar-based Process-In-Memory architecture. ACM/IEEE Design Automation Conference (DAC), page 1-6, 2020 (CCF-A)[PDF]

74.       Zhuoran Song, Jianfei Wang, Tianjian Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing: GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores.  ACM/IEEE Design Automation Conference (DAC), page 1-6, 2020 (CCF-A)[PDF]

75.       Chang Ma, Yanan Sun, Weikang Qian, Ziqi Meng, Rui Yang, Li Jiang*: Go Unary: A Novel Synapse Coding and Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020: 1432-1437 (CCF-B)[PDF]

76.       Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang, Li Jiang*: ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. ACM Great Lakes Symposium on VLSI, GLSVLSI 2020: 291-296 (CCF-C)[PDF]

77.       Zhuoran Song, Bangqi Fu, Feiyang Wu, Zhaoming Jiang, Li Jiang, Naifeng Jing, Xiaoyao Liang: DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration. ISCA 2020: 1010-1021 (CCF-A)[PDF]

78.       Tao Yang, Yunkun Liao, Jianping Shi, Yun Liang, Naifeng Jing, Li Jiang*: A Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern. International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, pages 254-261, 2020. (CCF-C)[PDF]

79.       Xingyi Wang, Li Jiang*, Krishnendu Chakrabarty: LSTM-based Analysis of Temporally- and Spatially Correlated Signatures for Intermittent Fault Detection. VTS 2020: 1-6 (CCF-C)[PDF]

80.       Q. Yan, L. Jiang* and S. S. Kia: Measurement Scheduling for Cooperative Localization in Resource-Constrained Conditions. in IEEE Robotics and Automation Letters, vol. 5, no. 2, pp. 1990-1997, April 2020 (ICRA, Top Tier)[PDF]

2019

81.       Xiaoyi Sun, Krishnendu Chakrabarty, Ruirui Huang, Yiquan Chen, Bing Zhao, Hai Cao, Yinhe Han, Xiaoyao Liang, Li Jiang*: System level hardware failure prediction using deep learning. To appear in ACM/IEEE Design Automation Conference (DAC), Las vegas, US, 2019. (CCF-A)[PDF]

82.       Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru Huang, Hai Zhao, Xiaoyao Liang and Li Jiang*: Approximate Random Dropout for DNN Training Acceleration in GPGPU. In Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, March 21-25, 2019. (CCF-B)[PDF]

83.       Houxiang Ji, Li Jiang*, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang: HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. Proceedings of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, January 21-24, 2019, pages 249-254. (CCF-C)[PDF]

84.       Geng Yuan,Xiaolong Ma,Caiwen Ding,Sheng Lin,Tianyun Zhang,Zeinab S. Jalali,Yilong Zhao,Li Jiang,Sucheta Soundarajan,Yanzhi Wang: An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMM. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), July 29-31, 2019. (CCF-C)[PDF]

85.      Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing: A sharing-aware L1.5D cache for data reuse in GPGPUs. Proceedings of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, January 21-24, 2019, pages 388-393. (CCF-C)[PDF]

2018

86.       Zhenghao Peng, Li Jiang*, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang and Cewu Lu: AXNet: ApproXimate computing using an end-to-end trainable neural network. International Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA, November 05-08, 2018, pages 11:1-11:8. (CCF-B, CSRanking Top Conference)[PDF]

87.       Haiyue Song, Li Jiang*, Chengwen Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang and Qiang Xu: Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. In Proceedings of the International Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA, November 05-08, pages 50. (CCF-B)[PDF]

88.       Houxiang Ji, Linghao Song, Li Jiang*, Hai Helen Li, and Yiran Chen*: Recom: An efficient resistive accelerator for compressed deep neural networks. In Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, March 19-23, 2018, pages 237-240. (CCF-B)[PDF]

89.       Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, and Li Jiang*: In-growth test for monolithic 3d integrated SRAM. In Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, March 19-23, 2018, pages 569-572. (CCF-B)[PDF]

90.       Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, and Li Jiang*: A FPGA friendly approximate computing framework with hybrid neural networks: (abstract only). In Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, USA, February 25-27, 2018, page 286, 2018. (CCF-B)[PDF]

2017

91.       Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang, and Li Jiang*: Sneak-path based test and diagnosis for 1R RRAM crossbar using voltage bias technique. In Proceedings of the 54th Annual Design Automation Conference (DAC), Austin, TX, USA, June 18-22, 2017, pages 38:1-38:6, 2017. (CCF-A)[PDF]

92.       Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, and Li Jiang*: On quality trade-off control for approximate computing using iterative training. In Proceedings of the 54th Annual Design Automation Conference (DAC), Austin, TX, USA, June 18-22, 2017, pages 52:1-52:6, 2017. (CCF-A)[PDF]

93.       Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, and Li Jiang*: Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar. In Design, Automation & Test in Europe Conference & Exhibition (DATE), Lausanne, Switzerland, March 27-31, 2017, pages 19-24, 2017. (CCF-B)[PDF]

94.       Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S. Lee, and Li Jiang*: Fault clustering technique for 3d memory BISR. In Design, Automation & Test in Europe Conference & Exhibition (DATE), Lausanne, Switzerland, March 27-31, 2017, pages 560-565, 2017. (CCF-B)[PDF]

2016

95.       Tianjian Li, Li Jiang*, Naifeng Jing, Nam Sung Kim, and Xiaoyao Liang: CNFET-based high throughput register file architecture. In 34th IEEE International Conference on Computer Design (ICCD), Scottsdale, AZ, USA, October 2-5, 2016, pages 662-669, 2016. (CCF-B)[PDF]

96.       Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang, and Naifeng Jing: Applying victim cache in high performance GPGPU computing. In 15th International Symposium on Parallel and Distributed Computing (ISPDC), Fuzhou, China, July 8-10, 2016, pages 24-29, 2016. (CCF-C)[PDF]

97.       Tianjian Li, Li Jiang*, Xiaoyao Liang, Qiang Xu, and Krishnendu Chakrabarty: Defect tolerance for CNFET-based SRAMs. In 2016 IEEE International Test Conference (ITC), Fort Worth, TX, USA, November 15-17, 2016, pages 1-9, 2016. (CCF-B)[PDF]

98.       Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, and Xiaoyao Liang: Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. In 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Taipei, Taiwan, October 15-19, 2016, pages 14:1-14:12, 2016. (CCF-A)[PDF]

2015

99.       Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, and Xinli Gu: On test syndrome merging for reasoning-based board-level functional fault diagnosis. In The 20th Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba, Japan, January 19-22, 2015, pages 737-742, 2015. (CCF-C)[PDF]

100.       Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, and Li Jiang*: Jump test for metallic cnts in cnfet-based SRAM. In Proceedings of the 52nd Annual Design Automation Conference (DAC), San Francisco, CA, USA, June 7-11, 2015, pages 16:1-16:6, 2015. (CCF-A)[PDF]

101.       Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, and Huiyun Li: A novel TSV probing technique with adhesive test interposer. In 33rd IEEE International Conference on Computer Design (ICCD), New York City, NY, USA, October 18-21, 2015, pages 597-604, 2015. (CCF-B)[PDF]

102.       Yiqing Hua, Chao Li, Weichao Tang, Li Jiang, and Xiaoyao Liang: Building fuel powered supercomputing data center at low cost. In Proceedings of the 29th ACM on International Conference on Super-computing (ICS), Newport Beach/Irvine, CA, USA, June 08 - 11, 2015, pages 241-250, 2015. (CCF-A)[PDF]

103.       Naifeng Jing, Shuang Chen, Shunning Jiang, Li Jiang, Chao Li, and Xiaoyao Liang: Bank-stealing for conflict mitigation in GPGPU register file: In IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Rome, Italy, July 22-24, 2015, pages 55-60, 2015. (CCF-B)[PDF]

104.       Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, and Qiang Xu: On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. In 2015 IEEE International Test Conference (ITC), Anaheim, CA, USA, October 6-8, 2015, pages 1-10, 2015. (CCF-B)[PDF]

105.       Li Jiang and Qiang Xu. Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. mccluskey doctoral thesis award competition finalist. In 2015 IEEE International Test Conference (ITC), Anaheim, CA, USA, October 6-8, 2015, pages 1-11, 2015. (CCF-B)[PDF]

106.       Li Jiang and Qiang Xu. Fault-tolerant 3d-noc architecture and design: Recent advances and challenges. In Proceedings of the 9th International Symposium on Networks-on-Chip (NOCS), Vancouver, BC, Canada, September 28-30, 2015, pages 7:1-7:8, 2015.[PDF]

107.       Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, and Li Jiang*: On microarchitectural modeling for cnfet-based circuits. In 28th IEEE International System-on-Chip Conference (SOCC), Beijing, China, September 8-11, 2015, pages 356-361, 2015.[PDF]

108.       Chen Wang, Li Jiang*, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, and Weikang Qian: Timing- driven placement for carbon nanotube circuits. In 28th IEEE International System-on-Chip Conference (SOCC), Beijing, China, September 8-11, 2015, pages 362-367, 2015.[PDF]

2013

109.       Li Jiang, Fangming Ye, Qiang Xu, Krishnendu Chakrabarty, and Bill Eklow. On effective and efficient in-field TSV repair for stacked 3d ics. In The 50th Annual Design Automation Conference (DAC), Austin, TX, USA, May 29 - June 07, 2013, pages 74:1-74:6, 2013. (CCF-A)[PDF]

110.       Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, and Xinli Gu. Agentdiag: An agent- assisted diagnostic framework for board-level functional failures. In 2013 IEEE International Test Conference (ITC), Anaheim, CA, USA, September 6-13, 2013, pages 1-8, 2013. (CCF-B)[PDF]

2012

111.       Qiang Xu, Li Jiang, Huiyun Li, and Bill Eklow. Yield enhancement for 3d-stacked ics: Recent advances and challenges. In Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC), Sydney, Australia, January 30 - February 2, 2012, pages 731-737, 2012. (CCF-C)[PDF]

112.       Li Jiang, Qiang Xu, and Bill Eklow. On effective TSV repair for 3d-stacked ics. In 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, March 12-16, 2012, pages 793-798, 2012. (CCF-B)[PDF]

2010

113.       Li Jiang, Rong Ye, and Qiang Xu. Yield enhancement for 3d-stacked memory by redundancy sharing across dies. In 2010 International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, November 7-11, 2010, pages 230-234, 2010. (CCF-B, CSRanking Top Conference)[PDF]

114.       Li Jiang, Yuxi Liu, Lian Duan, Yuan Xie, and Qiang Xu. Modeling TSV open defects in 3d-stacked DRAM. In 2011 IEEE International Test Conference (ITC), Austin, TX, USA, November 2-4, 2010, pages 174-182, 2010. (CCF-B)[PDF]

2009

115.       Li Jiang, Qiang Xu, Krishnendu Chakrabarty, and T. M. Mak. Layout-driven test-architecture design and optimization for 3d socs under pre-bond test-pin-count constraint. In 2009 International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, November 2-5, 2009, pages 191-196, 2009. (CCF-B, CSRanking Top Conference)[PDF]

116.       Li Jiang, Lin Huang, and Qiang Xu. Test architecture design and optimization for three-dimensional socs. In Design, Automation and Test in Europe (DATE), Nice, France, April 20-24, 2009, pages 220-225, 2009. (CCF-B)[PDF]